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andyrossandyross
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mt8196 tplg
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‎tools/topology/topology1/CMakeLists.txt‎

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@@ -98,6 +98,7 @@ set(TPLGS
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"sof-mt8186-mt6366\;sof-mt8186-mt6366-rt1019-rt5682s-waves\;-DWAVES=1"
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"sof-mt8188-mt6359\;sof-mt8188"
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"sof-mt8188-mt6359\;sof-mt8188-waves\;-DWAVES=1"
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"sof-mt8196-mt6681\;sof-mt8196"
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"sof-acp-renoir\;sof-acp"
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"sof-rn-rt5682-rt1019\;sof-rn-rt5682-rt1019"

‎tools/topology/topology1/platform/mediatek/mt8196.m4‎

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#
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# MT8196 differentiation for pipelines and components
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#
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include(`memory.m4')
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define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
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define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
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define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
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define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE))
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# Low Latency PCM Configuration
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W_VENDORTUPLES(pipe_ll_schedule_plat_tokens, sof_sched_tokens, LIST(` ', `SOF_TKN_SCHED_MIPS "50000"'))
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W_DATA(pipe_ll_schedule_plat, pipe_ll_schedule_plat_tokens)
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# Media PCM Configuration
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W_VENDORTUPLES(pipe_media_schedule_plat_tokens, sof_sched_tokens, LIST(` ', `SOF_TKN_SCHED_MIPS "100000"'))
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W_DATA(pipe_media_schedule_plat, pipe_media_schedule_plat_tokens)
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# DAI schedule Configuration - scheduled by IRQ
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W_VENDORTUPLES(pipe_dai_schedule_plat_tokens, sof_sched_tokens, LIST(` ', `SOF_TKN_SCHED_MIPS "5000"'))
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W_DATA(pipe_dai_schedule_plat, pipe_dai_schedule_plat_tokens)
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‎tools/topology/topology1/sof-mt8196-mt6681.m4‎

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#
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# Topology for MT8196 board with mt6681
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`afe.m4')
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include(`pcm.m4')
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include(`buffer.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include DSP configuration
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include(`platform/mediatek/mt8196.m4')
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#
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# Define the pipelines
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#
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# PCM0 ---> AFE (Speaker - nau8318)
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# PCM1 ---> AFE (Headset playback - nau88l25)
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# PCM2 <--- AFE (DMIC0 - AP)
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# PCM3 <--- AFE (Headset record - nau88l25)
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# PCM4 <--- AFE (DMIC1 - AP)
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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define(`ENDPOINT_NAME', `Speakers')
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# Low Latency playback pipeline 1 on PCM 16 using max 2 channels of s16le
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# Set 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(ifdef(`WAVES', sof/pipe-waves-codec-playback.m4, sof/pipe-passthrough-playback.m4),
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1, 0, 2, s16le,
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1000, 0, 0,
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48000, 48000, 48000)
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undefine(`ENDPOINT_NAME')
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define(`ENDPOINT_NAME', `Headphones')
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# Low Latency playback pipeline 2 on PCM 17 using max 2 channels of s16le
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# Set 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(ifdef(`WAVES', sof/pipe-waves-codec-playback.m4, sof/pipe-passthrough-playback.m4),
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2, 1, 2, s16le,
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1000, 0, 0,
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48000, 48000, 48000)
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undefine(`ENDPOINT_NAME')
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# Low Latency capture pipeline 3 on PCM 18 using max 2 channels of s16le
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# Set 2000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
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3, 2, 2, s16le,
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2000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 4 on PCM 19 using max 2 channels of s16le
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# Set 2000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
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4, 3, 2, s16le,
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2000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 4 on PCM 20 using max 2 channels of s16le
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# Set 2000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
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5, 4, 2, s16le,
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2000, 0, 0,
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48000, 48000, 48000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core)
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# playback DAI is AFE using 2 periods
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# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, AFE, 0, AFE_SOF_DL_24CH,
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PIPELINE_SOURCE_1, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is AFE using 2 periods
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# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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2, AFE, 1, AFE_SOF_DL1,
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PIPELINE_SOURCE_2, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is AFE using 2 periods
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# Buffers use s16le format, with 48 frame per 2000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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3, AFE, 2, AFE_SOF_UL0,
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PIPELINE_SINK_3, 2, s16le,
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2000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is AFE using 2 periods
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# Buffers use s16le format, with 48 frame per 2000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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4, AFE, 3, AFE_SOF_UL1,
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PIPELINE_SINK_4, 2, s16le,
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2000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is AFE using 2 periods
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# Buffers use s16le format, with 48 frame per 2000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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5, AFE, 4, AFE_SOF_UL2,
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PIPELINE_SINK_5, 2, s16le,
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2000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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#SCHEDULE_TIME_DOMAIN_DMA
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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# PCM Low Latency, id 0
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PCM_PLAYBACK_ADD(SOF_DL_24CH, 0, PIPELINE_PCM_1)
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PCM_PLAYBACK_ADD(SOF_DL1, 1, PIPELINE_PCM_2)
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PCM_CAPTURE_ADD(SOF_UL0, 2, PIPELINE_PCM_3)
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PCM_CAPTURE_ADD(SOF_UL1, 3, PIPELINE_PCM_4)
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PCM_CAPTURE_ADD(SOF_UL2, 4, PIPELINE_PCM_5)
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dnl DAI_CONFIG(type, dai_index, link_id, name, afe_config)
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DAI_CONFIG(AFE, 0, 0, AFE_SOF_DL_24CH,
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AFE_CONFIG(AFE_CONFIG_DATA(AFE, 0, 48000, 2, s16le)))
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DAI_CONFIG(AFE, 1, 0, AFE_SOF_DL1,
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AFE_CONFIG(AFE_CONFIG_DATA(AFE, 1, 48000, 2, s16le)))
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DAI_CONFIG(AFE, 2, 0, AFE_SOF_UL0,
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AFE_CONFIG(AFE_CONFIG_DATA(AFE, 2, 48000, 2, s16le)))
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DAI_CONFIG(AFE, 3, 0, AFE_SOF_UL1,
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AFE_CONFIG(AFE_CONFIG_DATA(AFE, 3, 48000, 2, s16le)))
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DAI_CONFIG(AFE, 4, 0, AFE_SOF_UL2,
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AFE_CONFIG(AFE_CONFIG_DATA(AFE, 4, 48000, 2, s16le)))
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