[Edgecore] Add as4500-52p DTS #11

brandonchuang · 2023-10-06T08:15:31Z

No description provided.

KanjiMonster · 2023-10-06T10:31:16Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+ * This board file supports the B configuration of the board
+ */
+
+#include "ac5.dtsi"


Did you intend to include accton-as4560-52p.dtsi here?

KanjiMonster · 2023-10-06T10:31:32Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree For AC5_db.


Filename says differently.

KanjiMonster · 2023-10-06T10:31:48Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+ * Copyright (C) 2021 Marvell
+ *
+ */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)


You already have that on top.

KanjiMonster · 2023-10-06T10:32:02Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+ * Device Tree file for Marvell Alleycat 5 development board
+ * This board file supports the B configuration of the board


This description is is for demo board and has been removed.

KanjiMonster · 2023-10-06T10:33:09Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

@@ -0,0 +1,395 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree For AC5.


Filename says differently.

Also nothing includes this .dtsi.

KanjiMonster

I don't like the accton-as4560-54p.dtsi at all, there should be a ac5(x).dtsi describing the SoC, used by all ac5x based boards, but I accept that the existing ac5.dtsi is not fit for that.

KanjiMonster · 2023-10-11T08:37:58Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+/*#include <dt-bindings/phy/phy-utmi-mvebu.h>*/


if you don't need it, remove it.

KanjiMonster · 2023-10-11T08:41:31Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

+		//clock-frequency = <10020>;
+		//clock-frequency = <110400>;
+		//clock-frequency = <110020>;


If you don't need it, remove it.

KanjiMonster · 2023-10-11T08:42:26Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

+				reg = <0x22004 0x4>;
+				clocks = <&core_clock>;
+				phy0: ethernet-phy@0 {
+					reg = < 0 0 >;


This should be only one value.

KanjiMonster · 2023-10-11T08:42:41Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

+				#gpio-cells = <2>;
+				gpio-controller;
+				reg = <0x18100 0x200>;
+				// gpio-ranges = <&pinctrl0 0 0 46>;


If you don't need it, remove it.

KanjiMonster · 2023-10-11T08:44:40Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dtsi

+				ranges;
+				dma-coherent;
+
+				sdhci0: sdhci@805c0000 {


Suggested change

sdhci0: sdhci@805c0000 {

sdhci0: mmc@805c0000 {

KanjiMonster · 2023-10-11T08:56:33Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+};
+
+&usb0 {
+	status= "okay";


usb0 is already enabled in the dtsi, no need to enable it again.

KanjiMonster · 2023-10-11T08:59:11Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+	compatible = "chipidea,usb2";
+	phys = <&usb1phy>;
+	phy-names = "usb-phy";


all these values should be part of the dtsi, since they seem to be fixed for ac5(x).

KanjiMonster · 2023-10-11T09:08:11Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+	phy-names = "usb-phy";
+	dr_mode = "host";
+};
+


You should be describing all devices attached to the i2c buses here via

&i2c0 { ... } &i2c1 { ... }

also describe the SFP ports as e.g. in https://github.com/dentproject/linux/blob/dent-linux-5.15.105/arch/arm64/boot/dts/marvell/ac5_db_trampoline.dts

KanjiMonster · 2023-10-11T09:15:39Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+#include "accton-as4560-52p.dtsi"
+
+/ {
+	model = "Marvell AC5X RD board";


I thought this is a AS4560-54p? ;)

KanjiMonster · 2023-10-11T09:23:17Z

arch/arm64/boot/dts/marvell/accton-as4560-52p.dts

+
+/ {
+	model = "Marvell AC5X RD board";
+};


I would have expected a chosen node here like in https://github.com/dentproject/linux/blob/dent-linux-5.15.105/arch/arm64/boot/dts/marvell/delta-tn48m-dn.dts#L52 that describes the default serial console. Or is there none?

CPU: [as4560-52p] Marvell 98DX3530 with integrated CPU [as4561-52p] COMe CPU Module MAC: Marvell 98DX3530 PHY: Marvell 88E1780 x 4 (1G port 16~32) Marvell 88E2780 x 2 (Migi-G port 33-48) DRAM: 8GB(MAC) DDR4 SDRAM AirFlow: Front To Back Function port: 1 x USB port 1 x RJ45 Mgmt port 1 x RJ45 Console port Ethernet Port: 48 x 1G Uplink port: 4xSFP+ PoE: Microsemi PD69208M x 12 + PD69210 x 2 DTS: The DTS for as4560-52p/as4561-52p dentproject/linux#12 dentproject/linux#11 Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>

CPU: Marvell 98DX3530 with integrated CPU MAC: Marvell 98DX3530 PHY: Marvell 88E1780 x 4 (1G port 16~32) Marvell 88E2780 x 2 (Migi-G port 33-48) DRAM: 8GB(MAC) DDR4 SDRAM AirFlow: Front To Back Function port: 1 x USB port 1 x RJ45 Mgmt port 1 x RJ45 Console port Ethernet Port: 48 x 1G Uplink port: 4xSFP+ PoE: Microsemi PD69208M x 12 + PD69210 x 2 The DTS is for the PR: dentproject/dentOS#285 Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>

CPU: [as4500-52p] Marvell 98DX3530 with integrated CPU [as4581-52p] COMe CPU Module MAC: Marvell 98DX3530 PHY: Marvell 88E1780 x 4 (1G port 16~32) Marvell 88E2780 x 2 (Migi-G port 33-48) DRAM: 8GB(MAC) DDR4 SDRAM AirFlow: Front To Back Function port: 1 x USB port 1 x RJ45 Mgmt port 1 x RJ45 Console port Ethernet Port: 48 x 1G Uplink port: 4xSFP+ PoE: Microsemi PD69208M x 12 + PD69210 x 2 DTS: The DTS for as4500-52p/as4581-52p dentproject/linux#12 dentproject/linux#11 Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>

brandonchuang · 2024-03-20T03:38:10Z

Updated the PR due to the platform name change from as4560 to as4500.

CPU: [as4500-52p] Marvell 98DX3530 with integrated CPU [as4581-52p] COMe CPU Module MAC: Marvell 98DX3530 PHY: Marvell 88E1780 x 4 (1G port 16~32) Marvell 88E2780 x 2 (Migi-G port 33-48) DRAM: 8GB(MAC) DDR4 SDRAM AirFlow: Front To Back Function port: 1 x USB port 1 x RJ45 Mgmt port 1 x RJ45 Console port Ethernet Port: 48 x 1G Uplink port: 4xSFP+ PoE: Microsemi PD69208M x 12 + PD69210 x 2 DTS: The DTS for as4500-52p/as4581-52p dentproject/linux#12 dentproject/linux#11 Signed-off-by: Brandon Chuang <brandon_chuang@accton.com>

KanjiMonster requested changes Oct 6, 2023

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brandonchuang force-pushed the dent-linux-5.15.105 branch from fa861d8 to 726d5ae Compare October 11, 2023 08:01

KanjiMonster requested changes Oct 11, 2023

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brandonchuang mentioned this pull request Feb 21, 2024

[Edgecore][as4500-52p][as4581-52p] Add new platform dentproject/dentOS#285

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brandonchuang force-pushed the dent-linux-5.15.105 branch from 726d5ae to fee8f91 Compare March 20, 2024 03:34

brandonchuang changed the title ~~[Edgecore] Add as4560-52p DTS~~ [Edgecore] Add as4500-52p DTS Mar 20, 2024

		* Device Tree file for Marvell Alleycat 5 development board
		* This board file supports the B configuration of the board

[Edgecore] Add as4500-52p DTS #11

Are you sure you want to change the base?

[Edgecore] Add as4500-52p DTS #11

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brandonchuang commented Oct 6, 2023

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brandonchuang commented Mar 20, 2024

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