Indigo Alpha9

This is an alpha release of the PiTubeDirect Indigo version.

Changes from Indigo Alpha8 include:

• lib6502 Co Pro: Fix tube window bug that broke early versions of Chuckie Egg 2023
• Fast 6502 Co Pro: Allow STZ absolute to write to tube registers
• Fast 6502 Co Pro: Reset banksel page mappings on every reset
• JIT 6502 Co Pro: Fix DEC on self modifying code
• JIT 6502 Co Pro: Reset banksel page mappings on every reset
• 80x86 Co Pro: Throw an illegal instruction interrupt on opcode 0xFF 0xFF
• 32016: Fix a regression in 89a9150 (17/07/2021) that broke the clock demo

Full Changelog: indigo-alpha8...indigo-alpha9

Indigo Alpha8

This is an alpha release of the PiTubeDirect Indigo version.

Changes from Indigo Alpha7 include:

• PDP11 Co Pro: Updated client ROM to Tube11v040 (version change only)
• Fix compatibility issue with Pi 1 Model A/B version 2.0 (#211). Thanks to JGH for reporting this issue.
• Fix activity LED not working on all Pi 1 models

Full Changelog: indigo-alpha7...indigo-alpha8

Indigo Alpha7

This is an alpha release of the PiTubeDirect Indigo version.

Changes from Indigo Alpha6 include:

PDP-11 Co Pro:

• Updated PDP client ROM to Tube11v030d-2024050
• Any size PDP11 Client ROM loaded and entered at top of memory

Framebuffer:

• Fix typos and cppcheck warnings

Full Changelog: indigo-alpha6...indigo-alpha7

Indigo Alpha6

This is an alpha release of the PiTubeDirect Indigo version.

IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230924 or later, available here.

Changes from Indigo Alpha5 include:

Co Pro 15 (Native ARM):

• a463c57 Fix fix bug introduced in last commit and refactor

Indigo Alpha5

This is an alpha release of the PiTubeDirect Indigo version.

IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230924 or later, available here.

Changes from Indigo Alpha4 include:

Co Pros 0-3 (6502), Co Pro 15 (Native ARM) and Co Pro 24 (6502 JIT):

• aa62026 copro-65tubeasm.S : make 64bit stack alignment clearer (#206)
• ef2169e Make sure the stack is 64bit aligned in assembler (#206)

Co Pro 15 (Native ARM):

• 753bc23 Fix This is not a language causing hard crash on Ctrl-BREAK (#205)

Co Pro 23 (Risc V):

• 2552913 Clear escape flag on BREAK

Indigo Alpha4

This is an alpha release of the PiTubeDirect Indigo version.

IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230924 or later, available here.

Changes from Indigo Alpha3 include:

Co Pro 8 (80x86 Co Pro):

• 9e9f9ee Co Pro 80x86: Change Co Pro name from 80286 to 80186

Co Pro 23 (RISC-V Co Pro):

• 993adc2 RISC-V Co Processor: Make R4 IRQ Re-enterant (#199)
• f4454ed RISC-V Co Processor: Implement the X bit in the Ecall Handler (#200)
• e5d175e RISC-V Co Processor: Preserve A7 in local OSCLI commands

Firmware Blob:

• 60e8f7d Updated firmware blob to current on 2023/10/13 (#204)

Indigo Alpha3

This is an alpha release of the PiTubeDirect Indigo version.

IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230924 or later, available here.

Changes from Indigo Alpha2 include:

Debugger:

• 3d115e5 Debugger: Fix an issue parsing 32-bit values > 7FFFFFFF
• c272952 Debugger: Refactor param parsing slightly
• f433b51 Debugger: Add search command

Co Pro 23 (RISC-V Co Pro):

• 378b161 Co Pro RISC-V: Change error number from 8-bits to 32-bits (#188)
• 392e36c Co Pro RISC-V: Use same default handler for all uncaught exceptions (#189)
• 3c5b3e5 Co Pro RISC-V: Improve formatting of default uncaught exception handler
• 383983b Co Pro RISC-V: Improve formatting of default uncaught exception handler
• 52fb800 Co Pro RISC-V: Improve disassembler (MUL extension, tighten illegal opcodes) (#195)
• e71beb1 Co Pro RISC-V: Improve disassembler (supress params on ECALL etc) (#195)
• 058c6a3 Co Pro RISC-V: Improve disassembler (CSR and number base) (#195)
• bd90678 Co Pro RISC-V: Improve disassembler (JAL/JALR) (#195)
• 78e06a6 Co Pro RISC-V: Change Co Pro name from RISCV to RISC-V
• 4094004 Co Pro RISC-V: Fix CSR immediate disassembly bug
• bddc721 Co Pro RISC-V: Track elapsedUs (#198)
• 463a477 Co Pro RISC-V: Clear mie on reset
• 9fdc21f Co Pro RISC-V: On ecall, only re-enable ints if previously enabled
• ffcced6 Co Pro RISC-V: Make timermatch registers readable
• 6f1c7d5 Co Pro RISC-V: Clear timer, timermatch on reset
• 6381b54 Co Pro RISC-V: Re-enable interrupts when calling error handler
• 7b7b3ed Co Pro RISC-V: Add seperate system stack, primarily for UncaughtExceptionHandler

Indigo Alpha2

This is an alpha release of the PiTubeDirect Indigo version.

IMPORTANT: If you want to use RISC-V BBC Basic on the RISC-V Co Processor, you must use version 20230910 or later, available here.

Changes from Indigo Alpha1 include:

Tube ULA:

• 4328a11 tube-ula.c : Fix software reset using bit 5 bug #63
• 3029fc8 Tube ULA: Fix two byte data transfer flags incorrect (#179)

Co Pro 15 (Native ARM Co Pro)

• 73491aa Darm.c : improve ldr/str rd,[PC,#xx] output
• 00606e8 Frame Buffer: POINT's offscreen check is not right (#175)

Co Pro 23 (RISC-V Co Pro):

• 3029fc8 Tube ULA: Fix two byte data transfer flags incorrect (#179)
• b3acee4 Co Pro RISC-V: fix type 3 data transfer used by Econet ANFS (#178)
• 9e42159 Co Pro RISC-V: Update OSFILE and OSGBPB APIs to use individual registers (#180, #181)
• cd6e516 Co Pro RISC-V: Make ECALL_BASE a symbol
• ee13dca Co Pro RISC-V: Update ECALL_BASE to 0x00AC0000 (#183)
• a6bb664 Co Pro RISC-V: Implement UnknownEcallHandler vector (#185)
• b8ce64e Co Pro RISC-V: Implement Uncaught Exception Handler (#184)
• f1b0383 Co Pro RISC-V: Seperate out workspace (RAM) from program (ROM)
• 5b2601a Co Pro RISC-V: Implement Current Program and OS_SYSCTRL a0=1 (#182)
• 3852dd0 Co Pro RISC-V: Fix wrong syscall number in *PI command
• bbbb816 Co Pro RISC-V: Use stack for tmp buffers in OSARGS and *PI
• 37e4c36 Co Pro RISC-V: Move ECALL table into RAM and implement OS_HANDLERS with a0>=0
• 28d97db Co Pro RISC-V: *HELP shows correct version
• 8cc21c2 Co Pro RISC-V: Default uncaught exception handler dumps all registers (#186)
• e18a5fa Co Pro RISC-V: Show accurate SP in register dump
• 47faff9 Co Pro RISC-V: Small improvement to OS_HANDLERS

Co Pro 24 (JIT 6502 Co Pro):

• 54ac16c jit.s typo and speed up stz

Indigo Alpha1

This is an alpha release of the PiTubeDirect Indigo version.

Changes from Hognose to Indigo include:

• a new RISC-V Co Processor (Co Pro 23) - see the wiki for more details
• a greatly improved JIT-based implementation of the 65C02 Co Processor (Co Pro 24)

Hogose Fixes

This is a patch release fixing a small number of issues that have come to light since hognose was released:

• 33bb8a6 - Co Pro 80x86: Switch from 80286/NMI to 80186/DMA
• 4590ace - Add a pullup to nTube (see BeebFPGA Issue 25 )
• 353e101 - Native ARM Co Pro: *PIVDU 2 OSWRCH Redirector copied from wrong address (#170)
• 61adcdf - Config: Pull the databus to 0x55 for detection on Spec Next
• c0ddeb5 - Arm Disassembler: Correct ADR target when direction is backwards (#172)

This release may be updated as and when further fixes are necessary.