[ibex] Add Zcb and Zcmp extensions #28997
Draft
+7,738
−2,687
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Update code from upstream repository https://github.com/lowRISC/ibex.git to revision 246849ed1063828355cae8a22c6f1aa95250c3b6 * [rtl] Fix linter warnings (Samuel Riedel) * [rtl,dv] Align rtl with new prims from OpenTitan (Samuel Riedel) * [fusesoc] Align fusesoc version with OpenTitan (2.4.3) (Samuel Riedel) * [rtl] Stop rvfi from reporting load information on stores (Samuel Riedel) * [dv] Fix the `riscv_dret_test` (Samuel Riedel) * [rtl] Drop empty ifdef pair (Rupert Swarbrick) * [CSR] Clarify PMP config assignment (Marno van der Maas) * [pmp] MSB and LSB of PMP address now params (Marno van der Maas) * [ci] Have an OSS-Formal CI Pass (Louis-Emile) * [dv/formal] Introduce an Open Source Formal Flow (Louis-Emile) * [dv/formal] Cleanup RTL for use by yosys-slang (Louis-Emile) * [dv/formal] Remove -fun2wires 2:rX (Louis-Emile) * [dv/formal] Remove buildspec.py (Louis-Emile) * Fix lowRISC/ibex#2302 (Akash Levy) * [doc] Fix typo'd alert name (James Wainwright) * [nix] update nixpkgs and move from poetry to UV (Gary Guo) * [formal] update sail (Gary Guo) * Fixes to testbench environment to support elaboration with Verific + INVIO (Akash Levy) * Use +define instead of -define to fix unknown option compiling with vcs (Rick Liu) * Fix dsim RTL incompatibilities (Akash Levy) * Unroll loops in ibex_core for dsim (Akash Levy) * Build system fixes for dsim (Akash Levy) * Nit: fix mismatch address reporting for ISS to remove top 32 bits (Akash Levy) * Update google_riscv-dv to chipsalliance/riscv-dv@71666eb (Akash Levy) * [c++] Upgrade to C++17 Support (Collin MacDonald) * Prevent compiler warning [-Wparentheses] (Harry Callahan) * Move debug exception vector to `BOOT_ADDR + 0x08 (Harry Callahan) * Support alternate memory system via '+is_discrete_debug_module' opt (Harry Callahan) * Support new spike version with configurable debug module address range (Harry Callahan) * Split the dv_defines out from the ibex_dv.f fileset (Harry Callahan) * Remove DmHaltAddrInRange_A and DmExceptionAddrInRange_A assertions (Harry Callahan) * [rtl, syn] Fix typos (Elliot Baptist) * [dv] Fix typos (Elliot Baptist) * [doc] Fix typos (Elliot Baptist) * [fcov] Add fcov for the interaction of pmp with debug module accesses (Harry Callahan) * [rtl] Split pmp_req_err_o logic to allow easier binding for fcov (Harry Callahan) * Change '/bin/bash' shebangs to '/usr/bin/env bash' (Harry Callahan) * [syn] Add keep_hierarchy constraints to prim_generic (Pascal Nasahl) * [syn] Enable synthesis for SecureIbex config (Pascal Nasahl) Signed-off-by: Samuel Riedel <sriedel@lowrisc.org>
Update code from upstream repository https://github.com/lowRISC/ibex.git to revision 0c233f54361d769f370889223acc456f2ac19d46 * [formal] Disable the Zc* extensions for formal verification (Samuel Riedel) * [rtl] Make Zcmp state registers resettable (Samuel Riedel) * [rtl] Compute `gets_expanded_o` only if the instruction is valid (Samuel Riedel) * [rtl] Add assertion to ensure the push/pop FSM only advances if valid (Samuel Riedel) * [rtl] Only start the push/pop FSM if the instruction is valid (Samuel Riedel) * [rtl] Optimize the Zcmp FSM (Samuel Riedel) * [rtl] Add explanations to the Zcmp state machine (Samuel Riedel) * [rtl] Fix handshake on compressed decoder (Samuel Riedel) * [rtl] Annotate traces with expanded instruction information (Samuel Riedel) * [rvfi] Track expanded instruction in rvfi (Samuel Riedel) * [rtl] Track last expanded instruction (Samuel Riedel) * [doc] Add Zcb and Zcmp extension to documentation (Samuel Riedel) * [rtl] Parametrize Zcb and Zcmp extensions (Samuel Riedel) * [rvfi] Output expanded instructions (except for the last one) (Andreas Kurth) * [rtl] Implement Zcmp extension (Andreas Kurth) * [rtl] Implement the Zcb extension (Elias Christen) Signed-off-by: Samuel Riedel <sriedel@lowrisc.org>
Signed-off-by: Samuel Riedel <sriedel@lowrisc.org>
SamuelRiedel
force-pushed
the
ibex-zcbzcmp
branch
from
3097cd4 to
f3411ef
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This PR vendors in the updated version of Ibex that contains the Zcb and Zcmp extensions as discussed in the RFC: Zcb and Zmp ISA extensions. These extensions are enabled by defaut, but can be disabled through the RV32ZC parameter.
The details are discussed in the corresponding Ibex PRs:
This PR is currently stacked on top of #28974, which aligns Ibex and OpenTitan's prims and fusesoc version. Make sure to rebase this PR after merging #28974.